PMRL News/Activities
Accordions
Prof. Fayed Presents at Texas A&M University
March 15, 2023
Prof. Fayed is invited to present at the Department of Electrical and Computer Engineering, Texas A&M University, on April 07, 2023 as part of TAMU's Analog and Mixed-Signal Seminar Series. The title of the presentation "Spur-Free Switching Power Converters for Noise-Sensitive Analog/RF Loads".
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Prof. Fayed Presents at Raytheon
November 18, 2022
Prof. Fayed will be presenting at Raytheon Company on Nov. 18, 2022. The title of the presentation "Introduction to Nyquist-Rate Data Converters".
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Prof. Fayed & Prof. Bibyk Present at Wayne State University
October 21, 2022
Prof. Fayed are Prof. Bibyk are invited to present at the Department of Electrical and Computer Engineering, Wayne State University, on October 21, 2022 as part of their SCALE workforce development activities. The title of the presentation "Microelectronics in the US Midwest: Opportunities for University Collaboration".
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Prof. Fayed Presents Two Short Courses at the 2022 CERF Meeting
August 1, 2022
Prof. Fayed will be presenting two half-day shourt courses at the 2022 Consortium on Electromagnetics and Radio Frequencies (CERF) meeting held at the ElectroScience Laboratory, The Ohio State University, Columbus, OH, Aug. 2022. The Courses are entitled "Introduction to Nyquist-Rate Data Converters" and "Integrated Dynamic Power Supplies for Mixed-Signal SoCs".
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Prof. Fayed Presents at KBR
January 29, 2022
Prof. Fayed will be presenting at KBR Inc. on Feb. 04, 2022. The title of the presentation "Switching Power Converters for Noise-Sensitive Analog/RF Loads".
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Prof. Fayed Presents at Raytheon
November 03, 2021
Prof. Fayed will be presenting at Raytheon Company on Nov. 12, 2021. The title of the presentation "Switching Noise Mitigation Techniques for DC-DC Power Converters Powering RF and Analog Circuit Loads".
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Prof. Fayed Presents two Tutorials at the 2021 CERF Meeting
June 17, 2021
Prof. Fayed will be presenting two tutorials at the 2021 Consortium on Electromagnetics and Radio Frequencies (CERF) meeting held at the ElectroScience Laboratory, The Ohio State University, Columbus, OH, Aug. 2021. The tutorials are entitled "Integrated Dynamic Power Supplies for Mixed-Signal SoCs" and "Switching Noise Mitigation Techniques for DC-DC Power Converters Powering RF and Analog Circuit Loads".
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Prof. Fayed Presents at Cirrus Logic Inc.
June 1, 2021
Prof. Fayed is invited to present at Cirrus Logic Inc., Austin, Texas, on June 8 and July 6, 2021 as part of their Distinguished Tech Talk Series. The title of the first presentation is "Spur-Free Switching Power Converters for Noise-Sensitive Analog/RF Loads", and the second presentation is "On-Chip Dynamic Power Supplies for Mixed-Signal SoCs".
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Prof. Fayed Presents to IEEE CASS, Dallas Chapter
May 1, 2021
Prof. Fayed is invited to present to the IEEE Circuits and Systems Society, Dallas Chapter, on May 6, 2021 as part of the Monthly Distinguished Seminar Series. The title of the presentation "On-Chip Dynamic Power Supplies for Mixed-Signal SoCs".
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Prof. Fayed Presents to ASAT-19
April 1, 2021
Prof. Fayed is invited as a Plenary Speaker at the 19th Int. Conf. on Aerospace Sciences & Aviation Technology (ASAT-19), Cairo, Egypt, on April 28, 2021. The title of the presentation "On-Chip Dynamic Power Supplies for Mixed-Signal SoCs".
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Prof. Fayed Presents at Wayne State University
January 10, 2021
Prof. Fayed is invited to present at the Department of Electrical and Computer Engineering, Wayne State University, on January 27, 2021 as part of the Department's Distinguished Seminar Series. The title of the presentation "On-Chip Dynamic Power Supplies for Mixed-Signal SoCs".
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Prof. Fayed Presents two Tutorials at the 2020 CERF Meeting
August 10, 2020
Prof. Fayed will be presenting two tutorials at the 2020 Consortium on Electromagnetics and Radio Frequencies (CERF) meeting held at the ElectroScience Laboratory, The Ohio State University, Columbus, OH, Aug. 2020. The tutorials are entitled "Integrated Dynamic Power Supplies for Mixed-Signal SoCs" and "Switching Noise Mitigation Techniques for DC-DC Power Converters Powering RF and Analog Circuit Loads".
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Prof. Fayed Presents at Raytheon
October 15, 2019
Prof. Fayed will be presenting at Raytheon Company, EL Segundo, CA, in Oct. 2019. The title of the presentation "Switching Noise Mitigation in DC-DC Power Converters for RF, Analog, and Mixed-Signal System-on-Chip (SoCs)".
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Prof. Fayed Presents at NSF Panel
October 1, 2019
Prof. Fayed will be presenting at NSF panel on enabling security primitives and features in RF/Analog domain, Division of ECCS, National Science Foundation, Oct. 2019. The title of the presentation "Security Vulnerabilities of Power Management Circuits".
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Prof. Fayed Presents at Google
September 10, 2019
Prof. Fayed will be presenting at Google Inc., Mountain View, CA, in Sept. 2019. The title of the presentation "Power Management Integrated Circuits Techniques for Mixed-Signal SoCs".
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Prof. Fayed Presents a Tutorial at the 2019 IEEE MWSCAS
April 25, 2019
Prof. Fayed will be presenting a tutorial entitled "High-Frequency Integrated Switching Power Supplies" at the 2019 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, Texas, Aug. 2019.
With the increasing demand for a larger number of highly-efficient fully-integrated power supplies within Systems-on-Chip (SoC), there is a need for developing switching power regulators with very high switching frequencies (tens or hundreds of MHz) with small enough passive components that can be integrated on-chip or co-packaged with the SoC. However, this involves many challenges, such as large switching losses, higher resistive parasitics and leakage associated with on-chip and on-package passives, and the difficulty of implementing power switches using low-voltage devices in nanometer CMOS. This tutorial will present the various techniques used to implement high-frequency fully-integrated power supplies in mixed-signal SoCs, along with a discussion of the advantages and shortcomings of each technique taking into account factors such as design complexity, silicon area, efficiency, and dynamic performance. The tutorial will start with a brief review of the basic operation of buck converters and the role of the switching frequency in the size of the passive components sizes. The tutorial will then focus on different flavors of high-frequency buck converters with on-chip or co-packaged passives, and multi-frequency SIMO buck converters with on-chip outputs. The tutorial will be concluded with a brief discussion of future trends and the likelihood of various techniques to be adopted in the industry.
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Prof. Fayed Presents a Tutorial at the 2019 IEEE ISCAS
January 31, 2019
Prof. Fayed will be presenting a tutorial entitled "On-Chip Dynamic Power Supplies for Mixed-Signal SoCs" at the 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, May 2019.
The diminishing returns of semiconductor technology scaling in terms of power reduction is forcing the electronics industry to shift from the traditional approach of using a few centralized static power supplies to power a System-on-Chip (SoC) to a numerous distributed dynamic power supplies approach. In this approach, the SoC is divided into sub-components, each with its own independent on-chip power supply that is dynamically adapted to the real-time demand of each sub-component. As a result, the overall power consumption of the SoC can be significantly reduced. However, such approach requires a large number of dynamic on-chip power supplies, and it becomes quite challenging to implement them in a size- and cost-effective manner while also maintaining high power conversion efficiency, particularly in nanometer CMOS technologies where the voltage rating of transistors is quite low compared to Li-Ion battery levels. This tutorial will present the various techniques used to implement a large number of on-chip dynamic power supplies in mixed-signal SoCs, along with a discussion of the advantages and shortcomings of each technique taking into account factors such as design complexity, silicon area, efficiency, and passive components requirements. The tutorial will start with a brief overview of the concept of distributed dynamic powering of SoCs, followed by a short review of the basic operation of buck converters and the role of the switching frequency in the dynamic behavior and passive components sizes. The tutorial will then focus on high-frequency buck converters with on-chip passives, and multi-frequency SIMO buck converters with on-chip outputs. This includes techniques for implementing on-chip inductors and capacitors, power switches, and gate-drive circuits. The tutorial will be concluded with a brief discussion of future trends and the likelihood of various techniques to be adopted in the industry.
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Prof. Fayed Presents at AFRL
uly 1, 2018
Prof. Fayed will be presenting at the Air Force Research Lab, Dayton, Ohio, on Jul. 2018. The title of the presentation "Spur-Free Switching Power Converters and Other Emerging Topics in Integrated Power Management for SoCs".
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Prof. Fayed Presents a Tutorial at the 2018 IEEE MWSCAS
June 30, 2018
Prof. Fayed will be presenting a tutorial entitled "Single- and Multi-Cell Battery Charging and Management Systems for IoT and Automotive Applications" at the 2018 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, Canada, Aug. 2018.
This tutorial will introduce the basic operation and characteristics of battery cells commonly used in IoT devices and automotive applications, including their charging/discharging profiles, self-discharging, internal impedance, charging cycles, and the effect of ambient and operating conditions on all these aspects. This will be followed by presenting the most common charging schemes used to charge single- and multi-cell battery stacks, including the constant-current constant-voltage charging scheme and the pulse charging scheme and the specific safety hazards and consideration for Li-Ion batteries. The tutorial will then present the circuit implementation of linear and switching battery charger topologies, fuel gauging circuits, and cell-monitoring and cell-balancing techniques. The tutorial will be concluded by presenting various implementation and performance examples of commercial battery charging systems and a discussion of practical considerations.
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Prof. Fayed Presents at Silicon Labs Inc.
February 21, 2018
Prof. Fayed will be presenting at Silicon Labs Inc., Austin, TX, on Feb. 2018. The title of the presentation "Spur-Free Switching Power Converters and Other Emerging Topics in Integrated Power Management for SoCs".
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Prof. Fayed Presents at Maxlinear Inc.
October 1, 2017
Prof. Fayed will be presenting at Maxlinear Inc., San Jose, CA, Oct. 2017. The title of the presentation "Emerging Topics in Integrated Power Management for VLSI Systems".
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Prof. Fayed Presents a Tutorial at the 2017 IEEE MWSCAS
July 1, 2017
Prof. Fayed will be presenting a tutorial entitled "Switching Noise Mitigation for Integrated DC-DC Converters" at the 2017 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, Massachusetts, Aug. 2017.
Mobile communication and navigation devices have fueled the demand for low power implementations to enhance battery life. A critical aspect of reducing power in these devices is the efficiency of the process of converting power from the battery to the various loads in the system. This makes high-efficiency DC-DC switching power converters a natural candidate for such task. Unfortunately, however, with the high level of integration of many noise-sensitive analog/RF circuits within these devices, the ability to use and integrate these DC-DC power converters is severely limited due to the large switching noise they generate, which tends to degrade the performance of analog/RF circuits. This forces the use of alternative, inefficient, but low-noise power converters such as linear regulators, and/or large passive components for switching noise suppression. These alternative techniques reduce battery life and increase implementation cost. This tutorial will start by introducing the basic operation of DC-DC power converters and the spectral characteristics of the switching noise they generate with different types of control schemes, such as PWM, PFM, and hysteretic control schemes during DCM and CCM operation modes. This will be followed by introducing the various mechanisms by which this switching noise can couple into and degrade the performance of noise sensitive loads in large SoCs, either directly through powering of these loads, or indirectly through shared power pins and substrate. An overview of conventional switching noise mitigation techniques employed in DC-DC converters will then follow, including techniques such as post linear regulation, active ripple cancellation, multi-phase converters, delta-sigma control, and frequency hopping/stepping. Spread-spectrum and spur-free control techniques that fully eliminate spurious noise in DC-DC converters will then be presented.
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Prof. Fayed Presents at Texas Instruments Inc.
June 1, 2017
Prof. Fayed will be presenting at Texas Instruments Inc., Dallas, TX, Jun. 2017. The title of the presentation "Integrated Power Management for Low-Power Low-Cost Microcontrollers: Challenges & Solutions".
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Prof. Fayed Presents a Tutorial at the 2017 IEEE ISCAS
May 1, 2017
Prof. Fayed will be presenting a tutorial entitled "Battery Charging System and Circuit Fundamentals for Portable and IoT Devices" at the 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, Maryland, May 2017.
With the expanded use of portable, battery-operated electronic devices in every aspect of human life, there is an increased interest in the design of battery chargers integrated circuits. Since this area is not typically covered in graduate or undergraduate circuits’ curriculum, there is a serious shortage in researchers and engineers who have the necessary background to develop efficient and cost-effective solutions. This tutorial will introduce the basic operation and characteristics of various primary and secondary battery cells, such as Alkaline, NiCd, Li-Ion, and NiMH, including their charging/discharging profiles, self-discharging, internal impedance, and charging cycles. This will be followed by presenting the most common charging schemes used to charge single- and multi-cell battery stacks, including the pulse charging scheme, and the constant-current constant-voltage charging scheme. Linear and switching battery charger topologies, fuel gauging, and cell-monitoring and cell-balancing circuits will also be discussed, including examples of commercial implantations of battery charger integrated circuits.
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Prof. Fayed Presents at Wayne State University
April 15, 2017
Prof. Fayed will be presenting at Department of Electrical and Computer Engineering, Wayne State University, Detroit, Michigan, April 2017. The title of the presentation "Emerging Topics in Integrated Power Management for VLSI Systems".
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Prof. Fayed Presents at NXP Inc.
April 1, 2017
Prof. Fayed will be presenting at NXP Inc., Phoenix, AZ, Apr. 2017. The title of the presentation "Emerging Topics in Integrated Power Management for VLSI Systems".
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Prof. Fayed Presents at Ford Motor Company
June 24, 2016
Prof. Fayed will be presenting at Ford Motor Company, Dearborn, MI, on June 28, 2016. The title of the presentation "Integrated Power Management for Automotive Applications".
Prof. Fayed to serve as President Elect of the ASP TC of IEEE CASS
June 15, 2021
Prof. Fayed has been elected to serve as the Chair Elect of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems Society (CASS) starting 2021. The IEEE Circuits and Systems Society is the leading organization that promotes the advancement of the theory, analysis, design, tools, and implementation of circuits and systems. The CASS society sponsors many leading academic journals and conferences in the field, including IEEE Transactions on Circuits and Systems I and II, as well as The IEEE International Symposium on Circuits and Systems (ISCAS). CASS Website.
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Prof. Fayed to serve as a Panelist in NSF panel on enabling security primitives and features in RF/Analog domain
October 1, 2019
Prof. Fayed to serve as a Panelist in the National Science Foundation panel on enabling security primitives and features in RF/Analog domain. The panel is organized by the Division of Electrical, Communications & Cyber Systems (ENG/ECCS).
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Prof. Fayed to serve as Secretary of the ASP TPC of IEEE CASS
June 15, 2019
Prof. Fayed has been elected to serve as the Secretary of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems Society (CASS) starting 2019. The IEEE Circuits and Systems Society is the leading organization that promotes the advancement of the theory, analysis, design, tools, and implementation of circuits and systems. The CASS society sponsors many leading academic journals and conferences in the field, including IEEE Transactions on Circuits and Systems I and II, as well as The IEEE International Symposium on Circuits and Systems (ISCAS). CASS Website.
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Prof. Fayed to Co-Organize a Workshop in 2019 IEEE RFIC
May 1, 2019
Prof. Fayed to co-organize and co-chair a workshop entitled "Analog and RF Hardware Security: Motivation, Challenges, and Solutions," at the 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Boston, Massachusetts, June 2019.
Powerful design, characterization, and implementation tools of electronic devices have become easier than ever to acquire by commercial and government entities alike. This, along with the knowhow of electronic design becoming globally accessible, opens the door to various activities that pose serious security risks. Some of these activities are incentivized only by commercial interests and profit, such as counterfeiting and IP theft, and others are driven by more malicious motives such as spying on, disrupting of, or interfering with the operation of a system. Regardless of the motivation, the question of how to improve the immunity of electronic devices to nefarious activities is a pressing one. This workshop discusses the security challenges associated with the analog, RF, and power portions of electronic systems, their place in the grand scheme of hardware security, why they are particularly vulnerable, how they can be exploited, and potential ways to address their security vulnerabilities.
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Prof. Fayed joins the TPC of IEEE APEC
March 15, 2018
Prof. Fayed will be joining the Technical Program Committee of the IEEE Applied Power Electronics Conference starting 2018. He will be serving as a track co-chair for the Power Electronics Integration and Manufacturing track. APEC focuses on the practical and applied aspects of the power electronics business. Conference Website
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Prof. Fayed to serve in the Technical Program Committee of IEEE MWSCAS 2017
January 1, 2017
Prof. Fayed to serve in Technical Program Committee of the IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, 2017. MWSCAS is the oldest circuits and systems symposium sponsored by the IEEE Circuits and Systems Society. The conference is dedicated for disseminating original work in all aspects of circuits and systems. Conference Website
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Prof. Fayed to serve as Tutorials & Special Sessions Chair in IEEE MWSCAS 2016
February 8, 2016
Prof. Fayed to serve as Tutorials & Special Sessions Chair in the IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, 2016. MWSCAS is the oldest circuits and systems symposium sponsored by the IEEE Circuits and Systems Society. The conference is dedicated for disseminating original work in all aspects of circuits and systems. Conference Website
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Prof. Fayed to serve as AE for IEEE TCAS-I
December 15, 2015
Prof. Fayed will be serving as an associate editor for IEEE Transactions on Circuits and Systems Part I for 1-year term starting Jan. 2016. The scope of the transactions is the theory, analysis,(computer aided) design, and practical implementation of circuits, and the application of circuit theoretic techniques to systems and to signal processing.
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Prof. Fayed to serve as AE for IEEE TCAS-II
December 15, 2014
Prof. Fayed will be serving as an associate editor for IEEE Transactions on Circuits and Systems Part II for 1-year term starting Jan. 2015. The scope of the transactions is the theory, analysis,(computer aided) design, and practical implementation of circuits, and the application of circuit theoretic techniques to systems and to signal processing. Only brief papers (maximum length less or equal five pages in standard IEEE Transactions submissions ) are considered for possible publication.
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Prof. Fayed joins the steering committee of IEEE MWSCAS
September 1, 2012
Prof. Fayed will be joining the Steering Committee of IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) starting 2013. MWSCAS is the oldest circuits and systems symposium sponsored by the IEEE Circuits and Systems Society. The conference is dedicated for disseminating original work in all aspects of circuits and systems.
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Prof. Fayed joins the TPC of IEEE ISCAS
July 3, 2012
Prof. Fayed will be joining the Technical Program Committee (Analog Signal Processing Sub-Committee) of IEEE International Symposium on Circuits and Systems (ISCAS) starting 2012. ISCAS is the world’s premier forum of leading researchers in the highly active fields of theory, design and implementation of circuits and systems. The conference is sponsored by the IEEE Circuits and Systems Society. Conference Website
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Prof. Fayed joins the TPC of IEEE RFIC
July 10, 2011
Prof. Fayed will be joining the Technical Program Committee (Analog Baseband Circuits Sub-Committee) of IEEE Radio Frequency Integrated Circuits (RFIC) Symposium starting 2011.The conference is dedicated for disseminating original work in RFIC design, system engineering, system simulation, design methodology, RFIC circuits, fabrication, testing, and packaging to support RF applications. RFIC is sponsored by the IEEE Microwave Theory and Techniques Society.
Prof. Fayed selected as Best Associate Editor of 2022 for IEEE Transactions of Circuits & Systems I
April 07, 2023
In recognition of his contributions to IEEE Transactions of Circuits & Systems I, Prof. Fayed has been recognized as Best Associate Editor of 2022 for IEEE TCAS-I from the IEEE Circuits and Systems Society. IEEE TCAS-I Editorial Board.
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Manmeet Singh and Prof. Fayed win the 2021 IEEE Transactions on Power Electronics Second Place Prize Paper Award
September 14, 2022
Manmeet Singh and Prof. Fayed have won the 2021 IEEE Transactions on Power Electronics Second Place Prize Paper Award from the IEEE Power Electronics Society for their paper entitled “A 1-A 6-MHz Digitally-Assisted Buck-Boost Converter with Seamless Mode Transitions and Fast Dynamic Performance for Mobile Devices.” Each year, the Editor and Associate Editors of the IEEE Transactions on Power Electronics recognize four first prize papers and six second prize papers deemed best among those published in the Transactions during the preceding calendar year. In 2021, TPEL published 1,233 regular papers, letters, and correspondences. The award is based on originality, contribution to the field, the extent to which the paper is supported by analysis and experimental evidence, and the quality of the presentation. Manmeet and Dr. Fayed will be receiving the award at the TPEL Editorial Board Meeting during IEEE ECCE conference in Detroit, Michigan (October 9-13, 2022). For more information:
Transactions on Power Electronics (TPEL) Prize Paper Awards, Ohio State Power Integrated Circuits Research Earns High Profile Recognition
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The Analog Signal Processing Technical Committee (ASPTC) has been awarded the 2022 IEEE Circuits & Systems Society Outstanding Technical Committee Award
August 13, 2022
In recognition of their service and contributions to the IEEE Circuits and Systems Society (CASS), the Analog Signal Processing Technical Committee (ASPTC) has been awarded the 2022 IEEE Circuits & Systems Society Outstanding Technical Committee Award. The Analog Signal Processing committee focuses on the theory, analysis, design, and practical implementation of analog circuits, and the application of analog circuit theoretic techniques to system and signal processing, ranging from basic scientific theory to industrial application. Prof. Fayed has been serving as the Secretary of the committee since 2019, then as the Chair Elect since 2021. CASS Website, ASPTC Website.
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Prof. Fayed Selected as the 2020-2021 Best Associate Editor of IEEE Transactions of Circuits & Systems I
September 19, 2021
In recognition of his contributions to IEEE Transactions of Circuits & Systems I, Prof. Fayed has been awarded the 2020-2021 Best Associate Editor Award from the IEEE Circuits and Systems Society. IEEE TCAS-I Editorial Board.
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Manmeet Singh Wins 1st Place in the 2020 John D. and Alice Nelson Kraus Memorial Graduate Student Poster Competition
August 24, 2020
Congratulations to Manmeet Singh for winning the 1st Place in the 2020 John D. and Alice Nelson Kraus Memorial Graduate Student Poster Competition. The Competition is an annual event where a select number of ECE Graduate Students at OSU present their research activities and findings. The presentations are judged by Faculty and Alumni.
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Prof. Fayed Promoted to Full Professor
July 15, 2020
Prof. Fayed has been promoted to the full professor rank at the Dept. of Electrical and Computer Engineering, The Ohio State University.
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Muhammad Ahmed Wins 1st Place in OSU's 2018 Kraus Memorial Graduate Student Poster Competition
April 18, 2018
Congratulations to Muhammad Ahmed for winning the 1st Place in the 2018 Kraus Memorial Graduate Student Poster Competition at OSU. The John D. and Alice Nelson Kraus Memorial Student Poster Competition is an annual event where a select number of ECE Graduate Students present their research activities and findings. The presentations are judged by Faculty and Alumni.
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Muhammad Ahmed Wins the 2018 Solid-State Circuits Society Student Travel Grant
January 1, 2018
Muhammad Ahmed has won the 2018 IEEE Solid-State Circuits Society Student Travel Grant (STGA). The STGA progam recognizes and promotes early career accomplishments in all solid-state circuits fields by supporting graduate student travel to SSCS-sponsored conferences: ISSCC and A-SSCC.
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Prof. Fayed Promoted to Associate Professor with Tenure
July 15, 2015
Prof. Fayed has been promoted to the associate professor rank with tenure at the Dept. of Electrical and Computer Engineering, Iowa State University.
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Chengwu Tao and Prof. Fayed win the 2015 Darlington Best Paper Award
February 2, 2015
Chengwu Tao and Prof. Fayed have won the 2015 Darlington Best Paper Award from the IEEE Circuits and Systems (CAS) Society for their paper entitled "A Low-Noise PFM-Controlled Buck Converter for Low-Power applications". The Darlington Best Paper Award recognizes the best paper bridging the gap between theory and practice published in the “Transactions on Circuits and Systems” publication. The award is based on general quality, originality, contributions, subject matter and timeliness. Chengwu and Dr. Fayed will be receiving the award during ISCAS 2015 held in Lisbon, Portugal.
CAS Awards, Darlington Best Paper Award Recipients
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Wei Fu wins Best Student Paper Award at IEEE MWSCAS 2014
July 10, 2014
Congratulations to Wei Fu for wining Best Student Paper Award (shared with other papers) at the 2014 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) for his paper entitled "A Self-Regulated 588 MHz Buck Regulator with On-chip Passives and Circuit Stuffing in 65nm". Wei will be receiving the award during MWSCAS 2014 held in College Station, Texas.
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Prof. Fayed Awarded the Northrop Grumman Chair Assistant Professorship
July 15, 2013
Prof. Fayed has been awarded the Northrop Grumman Chair Assistant Professorship from the Electrical and Computer Engineering department at Iowa State University for the 2013-2014 academic year. The professorship supports young faculty who exhibit a potential for leadership in electrical or computer engineering research, have a recognized commitment to excellence in teaching, and share his or her talents by collaborating with industry.
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Prof. Fayed Wins NSF CAREER Award
February 11, 2013
Prof. Fayed wins the prestigious NSF CAREER Award for his proposal entitled "CAREER: Multi-Frequency Multi-Output Switching Power Converters for Dynamic Energy Distribution in Highly Integrated Systems". The Faculty Early Career Development (CAREER) Program is a Foundation-wide activity that offers the National Science Foundation's most prestigious awards in support of junior faculty who exemplify the role of teacher-scholars through outstanding research, excellent education and the integration of education and research within the context of the mission of their organizations.
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Prof. Fayed Elevated to Senior Member of IEEE
September 1, 2009
Prof. Fayed is elevated to the Senior Member Grade of IEEE starting 2010. The grade of Senior Member is the highest for which application may be made and shall require experience reflecting professional maturity. For admission or transfer to the grade of Senior Member, a candidate shall be an engineer, scientist, educator, technical executive, or originator in IEEE-designated fields for a total of 10 years and have demonstrated 5 years of significant performance.
Tanner Tengberg Completes his Ph.D. Degree
May 31, 2023
Congratulations to Tanner Tengberg for completing his Ph.D. degree. His thesis is entitled "Spur-Free Dual-Frequency Single-Inductor Multiple-Output (DF-SIMO) Buck Converter Topologies". Tanner has accepted a senior analog and power management IC design engineer with Texas Instruments Inc.
Hua Zhang Completes his Ph.D. Degree
May 31, 2022
Congratulations to Hua Zhang for completing his Ph.D. degree. His thesis is entitled "Fully Integrated Switching Power Converters in Silicon Carbide Technology". Hua has accepted a senior analog and power management IC design engineer with Texas Instruments Inc.
Sita Asar Completes her Ph.D. Degree
December 31, 2020
Congratulations to Sita Asar for completing her Ph.D. degree. Her thesis is entitled "Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) Buck Converter Topology with Interleaved Output Power Distribution for Dynamic Voltage Scaling Applications". Sita is currently a senior analog and power management IC design engineer with Centauri Corp., Columbus, Ohio.
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Manmeet Singh Completes his Ph.D. Degree
July 31, 2020
Congratulations to Manmeet Singh for completing his Ph.D. degree. His thesis is entitled "Switching Power Converter Techniques for Server and Mobile Applications". Manmeet is currently with Cypress Semiconductor.
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Muhammad Ahmed Completes his Ph.D. Degree
December 15, 2018
Congratulations to Muhammad Ahmed for completing his Ph.D. degree. His thesis is entitled "Highly-efficient Low-Noise Buck Converters for Low-Power Microcontrollers". Muhammad has accepted a position at Texas Instruments Inc., Dallas, Texas.
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Ahmed Abdelmoaty Completes his Ph.D. Degree
December 16, 2016
Congratulations to Ahmed Abdelmoaty for completing his Ph.D. degree. His thesis is entitled "Circuit and System Techniques for Energy-Harvesting Platforms for Mobile Applications". Ahmed has accepted a position at Qualcomm Inc., San Jose, California.
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Mina Nashed Completes his Ph.D. Degree
December 15, 2016
Congratulations to Mina Nashed for completing his Ph.D. degree. His thesis is entitled "Variable Spurious Noise Mitigation Techniques in Hysteretic Buck Converters". Mina has accepted a position at Texas Instruments Inc., Tucson, Arizona.
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Yongjie Jiang Completes his Ph.D. Degree
May 15, 2016
Congratulations to Yongjie Jiang for completing his Ph.D. degree. His thesis is entitled "Dual-Frequency Dual-Inductor Multiple-Outputs (DF-DIMO) Buck converter topology with Fully-Integrated Output Filters". Yongjie has accepted a position at Broadcom Inc., Fort Collins, Colorado.
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Wei Fu Completes his Ph.D. Degree
May 15, 2015
Congratulations to Wei Fu for completing his Ph.D. degree. His thesis is entitled "Power Conversion Techniques in Nanometer CMOS Technologies for Low-Power Applications". Wei Fu has accepted an offer from Texas Instruments, Dallas, TX.
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Chih-Wei Chen Completes his Ph.D. Degree
May 15, 2015
Congratulations to Chih-Wei Chen for completing his Ph.D. degree. His thesis is entitled "Dual-Frequency Single-Inductor Multiple-Output (DF-SIMO) Power Converter Topology for SoC Applications". Chih-Wei has accepted an offer from Texas Instruments, Santa Clara, CA.
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Yongjie Jiang Completes his M.Sc. Degree
May 15, 2015
Congratulations to Yongjie Jiang for completing his M.Sc.. degree. His report is entitled "A 1A, 20MHz/100MHz Dual-Inductor 4-Output Buck Converter with Fully-Integrated Bond-Wire-Based Output Filters for Ripple Reduction". Yongjie is continuing his research towards his Ph.D. degree.
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Ahmed Abdelmoaty Completes his M.Sc. Degree
May 15, 2015
Congratulations to Ahmed Abdelmoaty for completing his M.Sc. degree. His report is entitled "A Sub-Micro Watt Maximum Power Point Tracking Circuit for Photovoltaic Systems". Ahmed is continuing his research towards his Ph.D. degree.
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Mina Nashed Completes his M.Sc. Degree
May 15, 2015
Congratulations to Mina Nashed for completing his M.Sc.. degree. His report is entitled "Hysteretic Buck Converters with Spur-Free Control". Mina is continuing his research towards his Ph.D. degree.
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Ailing Mei Completes her M.Sc. Degree
May 15, 2015
Congratulations to Ailing Mei for completing his M.Sc. degree. Her report is entitled "Constant-Current Constant-Voltage Switching Battery Charger for Li-Ion Batteries". Ailing has accepted an offer from Integrated Device Technology, Inc., San Jose, California.
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Yingying Chen Completes her M.Sc. Degree
December 15, 2014
Congratulations to Yingying Chen for completing his M.Sc. degree. Her report is entitled "A Dual-Loop Capacitor-less LDO with Fast Transient Response and High PSR". Yingying has accepted an offer from Broadcom, Inc., San Diego, California.
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Mohamed El Mahalawy Completes his M.Eng. Degree
December 15, 2013
Congratulations to Mohamed El Mahalawy for completing his M.Eng. degree. His project is entitled "Wide Bandwidth GaN-based Power Modulator for High Efficiency Power Amplifiers". Mohamed has accepted an offer from Rockwell Collins, Inc., Cedar Rapids, Iowa, and plans to pursue his Ph.D. degree concurrently.
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Shibing Zhao Completes his M.Eng. Degree
December 15, 2013
Congratulations to Shibing Zhao for completing his M.Eng. degree. His project is entitled "Capacitor-less high PSR linear regulators". Shibing has accepted an offer from Skyworks Inc., Cedar Rapids, Iowa.
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Chengwu Tao Completes his Ph.D. Degree
August 15, 2011
Congratulations to Chengwu Tao for completing his Ph.D. degree. His thesis is entitled "PWM Control Architecture for Spur-Free Operation in Buck Regulators". Chengwu has accepted an offer from Broadcom Inc., San Jose, California.
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Wei Fu Completes his M.Sc. Degree
August 15, 2011
Congratulations to Wei Fu for completing his M.Sc. degree. His report is entitled "Fully-integrated Buck Regulator with On-chip Passives in 65nm Technology for SoC Applications". Wei is continuing his research towards his Ph.D. degree.
Manmeet's Paper Appears in IEEE TPEL
September 4, 2020
Congratulations to Manmeet Singh for the publication of his paper entitled "A 1-A 6-MHz Digitally-Assisted Buck-Boost Converter with Seamless Mode Transitions and Fast Dynamic Performance for Mobile Devices" in the IEEE Transactions on Power Electronics.
In this paper, a 1-A 6-MHz buck-boost converter with seamless mode transitions and fast dynamic operation is proposed for extending the useable voltage range of Li-Ion batteries in mobile devices, and thereby their battery life. The proposed converter employs a Proportional-Integral (PI) peak-current-mode PWM controller with a digital adaptive slew-rate control scheme that minimizes output undershoots, overshoots, and settling time during mode transitions and dynamic events, such as load and output voltage steps. Additionally, hysteretic mode detection is proposed to prevent falsely triggering the converter to transition between the various operation modes (i.e buck, boost, and buck-boost) and negatively impacting the performance of the circuit loads. The converter is fabricated in 0.13-µm CMOS technology, and supports 2.3–5 V input and 1.5–3.6 V output. The converter achieves 91.7% peak efficiency and over 80% efficiency at 1-mA load across all conditions. The output voltage ripple is less than 10 mV with a 220-nH inductor and a 10-µF output capacitor.
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Manmeet's Paper to be Presented in the 2020 IEEE MWSCAS
August 1, 2020
Congratulations to Manmeet Singh for the acceptance of his paper entitled "A 2-A 6-MHz Hysteretic Buck Converter with an 8-Bit Digital Jitter-Insensitive Frequency Correction Loop using Dual-Sided Hysteretic Band Modulation," in the 2020 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, Aug. 2020.
Abstract: A 2-A current-mode hysteretic buck converter with constant switching frequency is proposed. The converter employs a high-resolution digital frequency correction loop and dual-sided hysteretic band modulation to tune and lock the steady-state switching frequency to a 6-MHz reference clock. As such, the superior dynamic performance of hysteretic control can be leveraged while also maintaining the predictable performance and simplified EMI filter design that result from a constant switching frequency. The dual-sided hysteretic band modulation eliminates any inductor current imbalance due to the continuous tuning of the switching frequency, and thus ensures smooth, transient-free frequency locking. Moreover, a hysteretic loop-suspension filter is proposed to desensitize the steady-state switching frequency of the converter to the 6-MHz reference clock jitter, which relaxes the specifications of the clock generator. Furthermore, due to its digital realization, the proposed frequency correction loop requires no passives to ensure stability. The converter is designed and simulated in a 0.13-µm CMOS technology. It operates from 2.7–5 V input and produces a 0.8–1.2 V output with a maximum load of 2 A. The converter achieves 90.5% peak efficiency and over 84% efficiency at 1-mA load. The output voltage ripple is less than 8 mV with a 220-nH inductor and a 6-µF output capacitor.
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Muhammad's Paper to be Presented in the 2020 IEEE APEC
March 15, 2020
Congratulations to Muhammad Ahmed for the acceptance of his paper entitled "A Spur-free, 150-mA Buck Regulator with 96.3% Peak-Efficiency and 77.2% Minimum Efficiency at 10-µA Load for Microcontrollers with Noise-Sensitive ADCs," in the 2020 IEEE Applied Power Electronics Conference (APEC), New Orleans, Louisiana, Mar. 2020.
This paper proposes a buck regulator with hybrid adaptive-on-time/hysteretic control and universal spur-free switching for Microcontroller Units (MCUs). The controller enables achieving high efficiency across a wide load range (10µA–150mA) and eliminates all spurious noise within the regulator. Therefore, it offers a single powering solution for MCUs that require both low-noise operation and high efficiency. The regulator is designed in 65nm CMOS, and occupies an active area of 0.18mm2. It operates from 2.7-4.2V input and produces a 1.2-3.3V output. The regulator’s peak efficiency is 96.3%, while its minimum efficiency at 10-µA load is 77.2%. Due to its spur-free operation, the regulator is used to directly power a high-performance 14-bit ADC without any degradation in the ADC’s dynamic range or effective number of bits and without using any post filtering or post regulation.
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Manmeet's Paper to be Presented in the 2019 IEEE MWSCAS
August 1, 2019
Congratulations to Manmeet Singh for the acceptance of his paper entitled "Imbalanced High-Current Multi-Phase Buck Converters for High-Performance CPUs," in the 2019 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, Texas, Aug. 2019.
Abstract: High-performance CPUs require buck converters with high-current ratings (4-12 A), fast dynamic response, and high efficiency across a wide load range. The most common approach for realizing such buck converters is the conventional multi-phase topology with phase-shedding, where all the active phases are identical in terms of the inductor, the switching frequency, and the share of the total load current, i.e. balanced phases. Instead, this paper proposes using a different inductor, switching frequency, and share of the total load current for each individual phase, i.e. imbalanced phases. This approach provides additional degrees of freedom by the independent choice of the inductor and the switching frequency of each phase, which enables higher maximum load current rating and higher efficiency across the entire load current range compared to conventional balanced multi-phase designs. To demonstrate the viability and the advantages of imbalanced multi-phase buck converters in high-current application, a 12-A 4-phase design in 0.13-µm CMOS for high-performance CPUs is presented and compared to three conventional balanced reference designs in the same process technology.
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Yongjie, Sita, Muhammad, and Hua's Paper Appears in IEEE TCAS-I
July 1, 2019
Congratulations to Yongjie, Sita, Muhammad, and Hua for the publication of their paper entitled "Output Control Techniques for Dual-Frequency SIMO Buck Converters" in the IEEE Transactions on Circuits and Systems I.
Abstract: The recently-proposed dual-frequency single-inductor multiple-output (DF-SIMO) buck converter topology is a promising approach for enabling the implementation of multiple fully-integrated power supplies with superior dynamic and cross-regulation performance in SoCs. However, switching the input and output stages at different frequencies raises many questions about the optimum strategy for controlling such converter topology. This paper explores and analyzes the various classes of controllers that can be employed in the output stage of the DF-SIMO buck converter topology, while taking account of key comparison metrics, such as circuit complexity, stability, steady-state and dynamic performance, and the range of operating conditions each controller may be suitable for. This includes average-based voltage-mode, ripple-based charge-mode, and ripple-based voltage-mode controllers. The predictions made by the analytical expressions derived for the various controllers are verified through system-level and transistor-level circuit simulations.
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Muhammad's Paper Appears in IEEE TPEL
April 30, 2019
Congratulations to Muhammad Ahmed for the publication of his paper entitled "A Current-Mode Delay-based Hysteretic Buck Regulator with Enhanced Efficiency at Ultra-light loads for Low-Power Microcontrollers" in the IEEE Transactions on Power Electronics.
In this paper, a current-mode buck regulator with delay-based hysteretic control for microcontroller applications is proposed. Unlike conventional hysteretic buck regulators with accurate explicit hysteretic bands, the proposed design relies only on the inherent delay of a low-speed single-threshold comparator to realize the hysteretic band, and can be seamlessly used across all loads in CCM and DCM without modifying the controller’s parameters. Moreover, without additional adaptation circuits or frequency regulation loops, the proposed delay-based hysteretic operation does not increase variations in the switching frequency with process and temperature, and results in even less variations in the switching frequency with the input and output voltages when compared to corresponding designs with accurate explicit hysteretic bands. The simplicity of the design reduces silicon area and quiescent current significantly, which in turns enables achieving high efficiency at both heavy and light load conditions as strictly required by low-power microcontrollers. The regulator is designed in a 65nm digital CMOS technology. It occupies 0.18 mm2 and supports a wide range of input voltages (1.8–4.2 V), output voltages (0.9–1.5 V), and load current (up to 300 mA). Measurement results show that the proposed regulator achieves 95% peak efficiency, while achieving between 62% and 87% efficiency at 10-µA load across all operating conditions.
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Muhammad's Paper to be Presented in the 2019 IEEE ISCAS
February 1, 2019
Congratulations to Muhammad Ahmed for the acceptance of his paper entitled "An All-Passive Emulated Ripple Control Technique For Constant-On-Time Buck Converters In CCM," in the 2019 IEEE International symposium on circuits and Systems (ISCAS), Sapporo, Japan, May 2019.
This paper introduces an all-passive Emulated Ripple Control (ERC) technique is proposed to ensure the stability of buck converters operating in Continuous Conduction Mode (CCM) with Constant-On-Time (COT) controllers. The proposed technique eliminates the poor DC load regulation limitation associated with conventional ERC control techniques, and reduces the variable DC offset associated with COT controllers in general. This is accomplished without compromising the converter’s stability or speed, and without requiring additional error amplifiers or comparators. Thus, quiescent current and silicon area can be significantly reduced. Simulation results show that the DC load regulation using the proposed ERC technique is improved from 100 mV/A to 78 μV/A, and the maximum output voltage offset is reduced from 89.5 mV to 0.82 mV compared to conventional ERC implementations.
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Sita and Hua's Poster to be Presented in the 2018 IEEE PWRSOC
September 1, 2018
Congratulations to Sita Asar and Hua Zhang for the acceptance of their poster entitled "Dual-Frequency SIMO Topologies for On-Chip Dynamic Power Supplies," in the 2018 IEEE Power Supply on Chip Workshop (PWRSoC), Hsinchu, Taiwan, Oct. 2018.
The Dual-Frequency Single-Inductor Multiple-Output (DF-SIMO) buck converter topology with freewheeling control is a promising approach for enabling the implementation of multiple efficient on-chip power supplies with superior dynamic and cross-regulation performance. Unlike conventional SIMO topologies, the DF-SIMO decouples the rate of power conversion at the input stage from the rate of power distribution at the output stage. Switching the input stage at low frequency simplifies its design in nanometer CMOS, especially with input voltages higher than 1.2 V, while switching the output stage at higher frequency reduces the required output capacitors to levels where they can be implemented on-chip, and results in superior dynamic performance and cross-regulation behavior without the significant efficiency loss and design complexity that would result from switching both the input and output stages at high frequency. Targeting multi-core CPUs and System-on-Chip (SoCs) with multiple power domains in nanometer CMOS, the DF-SIMO topology can be implemented in various ways based on the number of required outputs, power levels, and ripple voltage. This poster presents a 2-MHz/120-MHz design in 45-nm with 110mA total output current and 5 on-chip outputs, and a 20-MHz/120-MHz design in 65-nm with 1A total output current and 4 on-chip outputs.
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2 PMRL Papers to be Presented at 2018 IEEE MWSCAS
July 15, 2018
Congratulations to Yongjie Jiang, Sita Asar, and Manmeet Singh for the acceptance of their papers the 2018 IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, Canada, Aug. 2018. The papers titles are:
- An Average Inductor Current Sensor with Enhanced Accuracy in DCM for Buck Converters
- An 8 A 100-MHz 4-Phase Buck Converter with Fast Dynamic Response and Enhanced Light-Load Efficiency
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Yongjie, Muhammad, and Sita's Paper to be Presented in the 2018 IEEE ISCAS
March 10, 2018
Congratulations to Yongjie Jiang, Muhammad Ahmed, and Sita Asar for the acceptance of their paper entitled "An Accurate Sense-FET-based Inductor Current Sensor with Wide Sensing Range for Buck Converters," in the 2018 IEEE International symposium on circuits and Systems (ISCAS), Florence, Italy, May 2018.
This paper introduces an accurate sense-FET-based inductor current sensor for buck converters. The proposed sensor utilizes nonlinear adaptive biasing to maintain consistent bandwidth and phase margin in the sensor’s control loop across a wide range of load currents, leading to high sensing accuracy independent of the load. Moreover, auxiliary sensing FETs are proposed to eliminate sharp transitions in the sensed high-side and low-side currents as the buck converter switches between the ON and OFF phases. Eliminating these sharp transitions enables the bandwidths of the current sensor’s control loop and the nonlinear adaptive biasing generator to be greatly relaxed without compromising sensing accuracy, leading to lower power consumption. The proposed sensor is implemented as part of a 2-MHz buck converter in a 0.5-µm standard CMOS technology. Simulation results of the proposed sensor show a 10% reduction in current sensing error at light loads (~50mA) and 40 degrees of improvement in the phase margin of the sensor’s control loop at heavy loads (~5A), compared to conventional sense-FET-based current sensors. Furthermore, the variation in the unity gain frequency (UGF) of the proposed sensor’s control loop across the entire load range is 4.5 times lower than that of conventional designs.
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Moataz and Muhammad's Paper to be Presented in the 2018 IEEE ISSCC
February 11, 2018
Congratulations to Moataz Abdelfattah from the Circuit Laboratory for Advanced Sensors and Systems and Muhammad Swilam from PMRL for the acceptance of their paper entitled "An On-Chip Resonant-Gate-Drive Switched-Capacitor Converter for Near-Threshold Computing Achieving 70.2% Efficiency at 0.92 A/mm2 Current Density and 0.4V Output," in the 2018 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2018.
Near-threshold computing (NTC) is a promising approach to address the increasing demand for energy-efficiency in computing platforms. In NTC, the supply voltage is scaled down to realize quadratic energy savings while degrading the operating frequency only linearly, which can be compensated for by using many-core architectures. However, practical implementation of many-core NTC systems requires a large number of on-chip DC-DC converters to provide each core with independent voltages and fast dynamic voltage scaling at a reduced cost. Moreover, these converters must support heavy loads (few hundreds of milliamps) to supply the current required per core, or cluster of cores, while occupying minimal area (i.e. high current density) and achieving high power conversion efficiency at low output voltages.
To address this tradeoff, the dominant approach in the literature has been to preserve efficiency by increasing Cfly and mitigating the drop in current density by either using special capacitor technologies, such as deep-trench and high-density MIM capacitors, or through soft charging techniques. However, special capacitor technologies entail higher cost, and soft charging techniques are reported only at higher output voltages than required for NTC. In contrast, this paper increases Fsw to preserve current density while counteracting the increase in switching losses by utilizing an area-efficient resonant gate drive (RGD) circuit.
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Mina Nashed's Paper Appears in IEEE TPEL
January 1, 2018
Congratulations to Mina Nashed for the publication of his paper entitled "A Current-Mode Hysteretic Buck Converter with Spur-Free Control for Variable Switching Noise Mitigation" in the IEEE Transactions on Power Electronics.
In this paper, a current-mode hysteretic buck converter is proposed. The converter employs a spur-free constant-cycle frequency-hopping controller that fully eliminates spurs from the switching noise spectrum irrespective of variations in the switching frequency and operating conditions. As a result, the need for frequency regulation loops to ensure non-varying switching frequency (i.e. fixed spurs location) in hysteretic controllers is eliminated. Moreover, compared to frequency regulation loops, the proposed converter offers the advantage of eliminating mixing and interference altogether due to its spur-free operation, and thus, it can be used to power, or to be integrated within noise-sensitive systems while benefiting from the superior dynamic performance of its hysteretic operation. The proposed converter uses dual-sided hysteretic band modulation to eliminate the inductor current imbalance that results from frequency hopping along with the output voltage transients and low-frequency noise floor peaking associated with it. Moreover, a feedforward adaptive hysteretic band controller is proposed to reduce variations in the switching frequency with the input voltage, and an all-digital soft-startup circuit is proposed to control the in-rush current without requiring any off-chip components. The converter is implemented in a 0.35-μm standard CMOS technology and it achieves 92% peak efficiency.
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Yongjie's Paper to be Presented in the 2017 IEEE MWSCAS
August 1, 2017
Congratulations to Yongjie Jiang for the acceptance of his paper entitled "A Buck Converter with Optimized Dynamic Response using Lag-Lead Active Voltage Positioning," in the 2017 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, Massachusetts, Aug. 2017.
This paper proposes a lag-lead Active Voltage Positioning (AVP) technique that can be used in buck converters to minimize their output voltage transients during dynamic events, such as load pulses. The proposed technique is based on optimizing the output impedance of the converter across a wide range of frequencies, and therefore, output voltage transients in response to both narrow and wide load pulses can be minimized without increasing the converter’s main control loop bandwidth or the output capacitance. The proposed technique is verified with a 5-MHz buck converter design in 0.18-µm CMOS, where compared to conventional lag-only AVP designs, over 70% and 60% reduction in output voltage transients are achieved for wide and narrow load pulses respectively.
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Muhammad's Paper to be Presented in the 2017 IEEE ISCAS
May 1, 2017
Congratulations to Muhammad Ahmed for the acceptance of his paper entitled "A Calibration-Free Low-Power Supply-Pushing Reduction Circuit (SPRC) for LC VCOs," in the 2017 IEEE International symposium on circuits and Systems (ISCAS), Baltimore, Maryland, May 2017.
This paper proposes a calibration-free low-power circuit to reduce the sensitivity of LC VCOs to power supply variations, i.e. supply-pushing. At the highest Kv value of 26 MHz/V, simulation results show 14.5-kHz and 1.01-MHz peak-to-peak deviation from a 1.9-GHz center frequency for a 50-mV supply variation with and without the proposed circuit, respectively. This is equivalent to a supply pushing of 290 kHz/V with the proposed circuit versus 20 MHz/V without it, which is about 70-times improvement in supply pushing over conventional VCO implementations.
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Ahmed's Paper Appears in IEEE TCAS-I
October 18, 2016
Congratulations to Ahmed Abdelmoaty for the publication of his paper entitled "A MPPT Circuit with 25 μW Power Consumption and 99.7% Tracking Efficiency for PV Systems" in the IEEE Transactions on Circuits and Systems I. The paper was one of the top 50 most popular papers in IEEE TCAS-I for the month of October, 2016.
In this paper, a Maximum Power Point Tracking (MPPT) circuit for a 0.7-W photovoltaic (PV) system is proposed. The circuit employs a modified hill-climbing algorithm based on a 3-points comparison instead of the traditional 2-points comparison. The adopted algorithm simplifies the detection of the Maximum Power Point (MPP) and enables the implementation of a periodic sleep-mode to reduce the overall power consumption without compromising effective tracking of irradiance variations. Moreover, to achieve high MPP tracking efficiency, a low-power linear analog multiplier is implemented to accurately compute the instantaneous power of the PV source from its sensed voltage and current levels. This power-metering function is realized in the analog domain to eliminate the need for data converters and to minimize the MPPT circuit’s power consumption. A complete design of the proposed circuit is implemented in 0.18-µm BiCMOS process in less than 1.55 mm2 and consumes less than 25 µW with the digital core running at 500 kHz and a measured peak MPP tracking efficiency of 99.7%.
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Yongjie's Paper Appears in IEEE JSSC
August 8, 2016
Congratulations to Yongjie Jiang for the publication of his paper entitled "A 1A, Dual-Inductor 4-Output Buck Converter with 20-MHz/100-MHz Dual-Frequency Switching and Integrated Output Filters in 65nm CMOS" in the IEEE Journal of Solid-State Circuits. The paper was #11 out of the top 50 most popular papers in IEEE JSSC in the month of October, 2016.
In this paper, the Dual-Frequency Dual-Inductor Multiple-Output (DF-DIMO) buck converter topology is proposed. The topology employs a dual-phase 20-MHz current-mode-controlled input stage to reduce the inductance required per phase to only 200 nH, and a 4-outputs 100-MHz comparator-controlled fully-integrated output stage to reduce the capacitance required per output to 10 nF. In order to enable each output to handle up to 250-mA load with less than 40-mV voltage ripple, a 3rd-order bond-wire-based notch filter is employed at each output for voltage ripple suppression. Additionally, the proposed design employs dynamic output re-ordering to enhance cross-regulation performance, interleaved pulse-skipping to enhance light-load efficiency and dynamic performance, and high-gain error amplifier in the output feedback loop to enhance DC load Regulation. Targeting multi-core DSPs, the proposed design is implemented in standard 65-nm CMOS technology with 1.8-V input, and outputs in the range of 0.6–1.2 V with a total load of 1 A. It achieves a peak efficiency of 74%, less than 40-mV output voltage ripple, 0.5-V/70-ns Dynamic Voltage Scaling (DVS), and settling time of less than 85 ns for 125-mA load steps; all with no observable cross regulation transients.
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3 PMRL Papers to be Presented at 2016 IEEE MWSCAS
July 31, 2016
Congratulations to Mina Nashed, Ahmed Abdelmoaty, and Bora Tar for the acceptance of their papers the 2016 IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, UAE, Oct. 2016. The papers titles are:
- Spur-Free Current-Mode Hysteretic Boost Converter for Noise-Sensitive Loads
- Power Loss Analysis in Single-Step, Single-Inductor Energy-Harvesting-based Power Supplies
- An Overview of the Fundamentals of Battery Chargers
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Wei Fu's Paper Appears in IEEE TPEL
January 2, 2016
Congratulations to We Fu for the publication of his paper entitled "A DCM-only Buck Regulator with Hysteretic-Assisted Adaptive Minimum Constant On-time Control for Low-Power Microcontrollers" in the IEEE Transactions on Power Electronics.
In this paper, a 40mA buck regulator operating in the inherently stable Discontinuous Conduction Mode (DCM) for the entire load range is proposed. A Pulse Frequency Modulation (PFM) control scheme is implemented using a proposed Hysteretic-Assisted Adaptive Minimum-On-Time (HA-AMOT) controller to automatically adapt the regulator to a wide range of operating scenarios in terms of input, output, and passive component values while ensuring compensation-less DCM operation with minimized inductor peak current. Thus, compact silicon area, low quiescent current, high efficiency, and robust performance across all possible scenarios can be achieved without any calibration. Moreover, power-gating is employed in the analog circuits of the proposed controller to further improve efficiency at sub-1mA loads. The regulator is integrated within a low-power microcontroller in 90nm CMOS to power its digital core while allowing maximum flexibility in the powering options of the microcontroller and the choice of the passive components. It occupies 0.1mm2 and achieves 92% peak efficiency, and 78.5% and 86% efficiency at 200µA and 40mA loads respectively. It handles an input in the range of 1.8V-4.2V, an output in the range of 0.9V-1.4V, an inductor in the range of 4.7µH-10µH, and an output capacitor in the range of 2.2µF-10µF without any calibration or re-optimization.
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Chih-Wei's Paper Appears in IEEE JSSC
September 1, 2015
Congratulations to Chih-Wei for the publication of his paper entitled "A Low-Power Dual-Frequency SIMO Buck Converter Topology with Fully-Integrated Outputs and Fast Dynamic Operation in 45-nm CMOS" in the IEEE Journal of Solid-State Circuits.
In this paper, the Dual-Frequency Single-Inductor Multiple-Output (DF-SIMO) buck converter topology is proposed for the first time. Unlike conventional single-frequency SIMO topologies, the DF-SIMO decouples the rate of power conversion at the input stage from the rate of power distribution at the output stage. Switching the input stage at low frequency (~2 MHz) simplifies its design in nanometer CMOS, especially with input voltages higher than 1.2 V, while switching the output stage at higher frequency enables faster output dynamic response, better cross-regulation, and smaller output capacitors without the efficiency and design complexity penalty of switching both the input and output stages at high frequency. Moreover, for output switching frequency higher than 100 MHz, the output capacitors can be small enough to be integrated on-chip. A low-power 5-output 2-MHz/120-MHz design in 45-nm with 1.8-V input targeting low-power microcontrollers is presented as an application. The outputs vary from 0.6 V to 1.6 V, with 4 outputs providing up to 15 mA and one output providing up to 50 mA. The design uses single 10- H off-chip inductor, 2-nF on-chip capacitor for each 15-mA output and 4.5-nF for the 50-mA output. The peak efficiency is 73%, Dynamic Voltage Scaling (DVS) is 0.6 V/80 ns, and settling time is 30 ns for half-to-full load steps with no observable overshoot/undershoot or cross-regulation transients.
Tanner Tengberg and Utsav Gupta Join PMRL
January 1, 2020
Tanner Tengberg and Utsav Gupta will be joining PRML to pursue their Ph.D. degrees starting January and August, 2020, respectively. Tanner's research will focus on hardware-secured power supplies, while Utsav's research will focus on integrated power converters in SiC.
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Bora Tar Joins Dept. of Physics at OSU
December 15, 2017
Congratulations to Bora Tar, who will be joining the Dept. of Physics at The Ohio State University as an Analog Design Engineer starting Jan. 2018. Bora has been a postdoctorate research associate at PMRL since May 2016, where he worked on switching power converters and battery chargers for energy harvesting applications.
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Hua Zhang Joins PMRL
July 15, 2017
Hua Zhang will be joining PMRL starting Aug. 2017 to pursue his Ph.D. degree. His research will focus on power converters in SiC technologies. Hua holds a B.Sc. and M.Sc. degrees in Electronics Engineering from Southeast University, Nanjing, China.
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Manmeet Singh Joins PMRL
July 15, 2016
Manmeet Singh will be joining PMRL starting Aug. 2016 to pursue his Ph.D. degree. His research will focus on high-frequency multi-phase power converters for multi-core CPUs. Manmeet holds a B.Sc. degree in Electronics and Communications Engineering from University of Mumbai, and a M.Sc. degree in Electrical and Computer Engineering from Arizona State University.
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Sita Asar Joins PMRL
May 1, 2016
Sita Asar will be joining PMRL starting Aug. 2016 to pursue her Ph.D. degree. Her research will focus on on-chip dynamic power supplies for mixed-signal SoCs. Sita hold a B.Sc. degree in Physics and a M.Sc. in Electrical and Computer Engineering from The Ohio State University.
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Bora Tar Joins PMRL
December 20, 2015
Bora Tar will be joining PMRL starting Mar. 2016 as a postdoctorate research associate. His research will focus on switching power converters for energy harvesting applications.
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Mohamed Elkhatib Joins PMRL
December 15, 2015
Mohamed Elkhatib will be joining PMRL from Mar. to Aug., 2016 as a visiting scholar. His research will focus on applying fuzzy logic controllers to power converters.
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Prof. Fayed Joins the ECE Dept. at OSU
July 15, 2015
Prof. Fayed will be joining the department of Electrical and Computer Engineering at The Ohio State University starting Sept. 2015. He will continue to serve in a collaborator professor capacity and supervise several graduate students at Iowa State University.